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忆阻数字逻辑电路设计

王晓媛 金晨曦 周鹏飞

王晓媛, 金晨曦, 周鹏飞. 忆阻数字逻辑电路设计[J]. 电子与信息学报, 2020, 42(4): 851-861. doi: 10.11999/JEIT190864
引用本文: 王晓媛, 金晨曦, 周鹏飞. 忆阻数字逻辑电路设计[J]. 电子与信息学报, 2020, 42(4): 851-861. doi: 10.11999/JEIT190864
Xiaoyuan WANG, Chenxi JIN, Pengfei ZHOU. Memristive Digital Logic Circuit Design[J]. Journal of Electronics and Information Technology, 2020, 42(4): 851-861. doi: 10.11999/JEIT190864
Citation: Xiaoyuan WANG, Chenxi JIN, Pengfei ZHOU. Memristive Digital Logic Circuit Design[J]. Journal of Electronics and Information Technology, 2020, 42(4): 851-861. doi: 10.11999/JEIT190864

忆阻数字逻辑电路设计

doi: 10.11999/JEIT190864
基金项目: 国家自然科学基金(61871429),浙江省自然科学基金(LY18F010012)
详细信息
    作者简介:

    王晓媛:女,1981年生,副教授,研究方向为新型记忆元件(忆阻器、忆容器和忆感器)理论及应用,非线性电路系统设计和信息加密算法研究

    金晨曦:男,1996年生,硕士,研究方向为忆阻器、忆阻数字逻辑电路

    周鹏飞:男,1996年生,硕士,研究方向为忆阻器、忆阻数字逻辑电路

    通讯作者:

    王晓媛 youyuan-0213@163.com

  • 中图分类号: TN601; TN791

Memristive Digital Logic Circuit Design

Funds: The National Natural Science Foundation of China (61871429), The Natural Science Foundation of Zhejiang Province (LY18F010012)
  • 摘要: 该文简要概述了忆阻器理论的提出、应用现状及其在电子技术领域发展的现状,介绍了忆阻器在数字逻辑电路设计中的重要意义,并结合惠普(HP)忆阻器的二值特性及其电路特性,对忆阻器在数字逻辑电路设计中的发展、趋势及可应用前景进行了综述,可为忆阻器在数字逻辑电路中的后续研究及相关应用提供一定的参考。
  • 图  1  HP忆阻器阻值变化机制

    图  2  HP忆阻器v-i特性曲线

    图  3  忆阻实质蕴涵逻辑

    图  4  使用实质蕴涵逻辑完成“或”运算

    图  5  2输入MRL逻辑门电路结构

    图  6  2输入MAGIC逻辑门电路结构

    图  7  3输入阈值门电路图

    图  8  忆阻LTG门电路结构

    图  9  通用布尔逻辑门集的类CMOS纳米级电路设计

    图  10  类CMOS忆阻互补逻辑实现组合逻辑

    图  11  2输入“与非”门类CMOS电路

    图  12  2输入布尔逻辑门及其运算电路结构

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    • 收稿日期:  2019-11-07
    • 修回日期:  2020-02-04
    • 网络出版日期:  2020-03-02
    • 刊出日期:  2020-06-04

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